Field of the Invention
The present disclosure relates to a field-effect transistor, a display element, an image display device, and a system.
Description of the Related Art
Field-effect transistors (FETs) are transistors which control electric current between a source electrode and a drain electrode based on the principle that an electric field is applied to a gate electrode to provide a gate in a flow of electrons or holes utilizing an electric field of a channel.
By virtue of their characteristics, the FETs have been used as, for example, switching elements and amplifying elements. The FETs are low in gate current and have a flat structure, and thus can be easily produced and integrated as compared with bipolar transistors. For these reasons, the FETs are essential elements in integrated circuits used in the existing electronic devices. The FETs have been applied to, for example, active matrix displays as thin film transistor (TFTs).
In recent years, flat panel displays (FPDs), liquid crystal displays (LCDs), organic electroluminescent (EL) displays, and electronic paper have been put into practice.
These FPDs are driven by a driving circuit containing TFTs using amorphous silicon or polycrystalline silicon in an active layer. The FPDs have been required to have an increased size, improved definition and image quality, and an increased driving speed. To this end, there is a need for TFTs that have high carrier mobility, a high on/off ratio, small changes in properties over time, and small variation between the elements.
However, amorphous silicon or polycrystalline silicon have advantages and disadvantages. It was therefore difficult to satisfy all of the above requirements at the same time. In order to respond to these requirements, developments have been actively conducted on TFTs using, in an active layer, an oxide semiconductor the mobility of which can be expected to be higher than amorphous silicon. For example, disclosed is a TFT using InGaZnO4 in a semiconductor layer (for example, K. Nomura, and 5 others “Room-temperature fabrication of transparent flexible thin film transistors using amorphous oxide semiconductors”, NATURE, VOL. 432, 25, Nov., 2004, pp. 488 to 492 (hereinafter may be referred to as Non-Patent Literature 1)).
The TFT is required to have a small change in threshold voltage. One reason why the threshold voltage of the TFT will change is that moisture, oxygen, hydrogen, and other substances in the atmosphere are adsorbed onto or released from the semiconductor layer. Also, the threshold voltage will change as a result of repeating ON and OFF of the TFT many times for a long time. As a method for evaluating a change in threshold voltage as a result of such ON and OFF operations repeated many times for a long time, a bias temperature stress (BTS) test is generally performed. This test is a method of evaluating a change in threshold voltage when constant voltage is continuously applied between a gate electrode and a source electrode of a field-effect transistor, or a method of evaluating a change in threshold voltage when constant voltage is continuously applied between a gate electrode and a source electrode and between a drain electrode and a source electrode.
In order to suppress a change in threshold voltage of the TFT, the TFT generally has a passivation layer. Here, the passivation layer refers to a layer having functions such as separation and protection of semiconductors from moisture, oxygen, hydrogen, and other substances in the atmosphere. Also, the passivation layer may be called a protection layer.
As an approach regarding a protection layer (passivation layer) for suppressing a change in threshold voltage of the TFT, disclosed is a field-effect transistor containing a protection layer (passivation layer) having a laminated structure, one layer of which is SiO2, Si3N4, SiON, Al2O3, Ta2O5, TiO2, HfO2, ZrO2, or Y2O3 (for example, Japanese Unexamined Patent Application Publication No. 2010-135462 (hereinafter may be referred to as Patent Literature 1)). Also, a field-effect transistor containing a passivation layer of SiO2 is disclosed (for example, Y. Ohta, 11 others, “Amorphous In—Ga—Zn—O TFT-LCDs with high reliability”, IDW'09, 2009, pp. 1685-1688 (hereinafter may be referred to as Non-Patent Literature 2)). Further, disclosed is a field-effect transistor containing a protection layer (passivation layer) having a laminated structure of a first protection layer (passivation layer) containing a first complex metal oxide containing Si and an alkaline earth metal; and a second protection layer (passivation layer) containing a second complex metal oxide containing an alkaline earth metal and a rare earth element (for example, Japanese Unexamined Patent Application Publication No. 2015-111653 (hereinafter may be referred to as Patent Literature 2)).